Intel Patents On-Chip Cosmic Ray Detectors

holy_calamity writes "Intel has been awarded a patent for building cosmic ray detectors into chips, to guard against soft errors where a high energy particle from space changes a value in a circuit. It's a problem that largely only affects RAM. As component sizes shrink futher, "this problem is projected to become a major limiter of computer reliability in the next decade", says the patent. Intel's solution is to build in a detector that responds to cosmic errors by repeating the latest operation, reloading previous instructions, or rolling back to a previous state. You can also read the full patent."

Mainframes allegedly already do this

[Florian Weimer]

But you can't really verify it because those events are so rare. It seems to me that Intel's innovation is to use some sort of detector, instead of using two or more chips and a comparator. It's probably way cheaper, but it won't work if the majority of unexplainable events are not, in fact, caused by cosmic rays but by some other effect (perhaps something temperature-related).

How?

[mistersooreams]

How did they manage to build a detector that can work out whether the cosmic rays collided with the actual bits (no pun intended) that hold the data? According to the oracle [wikipedia.org], cosmic rays collide with nuclei in an essential random way, so there's no way a detector could just see a ray passing through and know whether it was on a collision course. Perhaps they are detecting the pions and other subatomic particles that result from a collision actually occurring? If they've found a way to do that then it sounds fairly ingenious to me and a well-deserved patent.

Rollback? Repeat last operation? Not likely.

[BenJeremy]

It's just as likely registers could be corrupted, or the "rollback" state. Wouldn't be easier to have, I dunno, maybe error correction/detection involved, instead of some arbitrary cosmic ray detector?

Sometimes the more "esoteric" designers attempt to get simply leads to more potential for disaster.

Cosmic ray detection would be far better for random number generation, than anything else.

Shouldn't take long...

[canada_dry]

It won't take long for someone to figure out how to detect the gamma errors and create what amounts to a geiger counters on laptop computers. If this bill passes http://www.villagevoice.com/news/0803,thompson,78873,2.html [villagevoice.com] will everyone be required to get a permit for their laptop computers? ;-)

Re:Mainframes allegedly already do this

[Ceriel Nosforit]

I saw a display in the visitors' center at CERN that detected cosmic rays. A cloud chamber, maybe.

Either way, the... 2m by 2m (IIRC) display would detect cosmic rays about once every 2 seconds. This would mean my PC case is perforated by cosmic rays several times each minute. That's not rare.

Current work and contribution of this paper

[quo_vadis]

Currently, chips (both computational and memory) are protected against soft errors using multiple methods. There are rad hardening methods (both hardware and software) and most of the latest research involves using error correcting codes. Simply duplicating the output and comparing can only detect errors in one bit. The more the times you duplicate, the more you can detect (it progresses as n-1), and the max length of error that can be corrected is half that. However, this takes a lot of space (duplication that is), so generally other codes such as Hamming or BCH codes are used.

The main problem using codes and everything is that cosmic ray errors cause whats called single event upsets and most codes can not detect 100% of errors where the hamming weight of the error (sum of number of ones in the error vector) is larger than the designed specification of the error. The problem comes when the SEU manifests itself as a multi-bit fault and the error vector cannot be detected by the code. SEU's are the most common type of errors in space application : See http://www.eas.asu.edu/~holbert/eee460/see.html [asu.edu]

The contribution of the cosmic error detector is that if you know you have a cosmic ray at some point in time, you can flush and redo your computation (for computation channels eg microprocessors etc) or flush that line in memory (for memory channels) in case of SEU's and that is a pretty big deal.

Re:Current work and contribution of this paper

[museumpeace]

you mention rad hardening...some of that tech. would have been first needed in military satellites and so not necessarily divulged in a patent. One kind of rad hardened circuit that used to be prohibitive but with advances in solid state fab requires a particular kind of redundancy. It has been described in prior literature kinda like this: build a functional duplicate of each storage or processing element in a parallel layer so that ...

• each element is aligned right over its corresponding element in the 2nd layer.
• bias the logic of one layer such that the burst of conduction band electrons that would accompany a gamma ray hit will report a false "1" if anything.
• bias the corresponding logic in the other layer so that that same burst of electrons...which will befall it at exactly the same time an place as its aligned circuit...will fault to a "0",if anything
• gate the primary layer's output by the !XOR of the two layers: whatever the state of the circuit was supposed to be, it will be disabled until the transient from the gamma ray has been quenched

Well known problem from 286 days

[Anonymous Coward]

Back in the early '80s, you could boot an IBM PC with its 286 and just let it idle: in about 3 weeks you would have to reboot it here in Denver due to the cosmic rays at our mile high altitude. This was not crufty software, this was solely due to accumulated free charges from to the ionizing radiation eventually becoming so large the cpu could not flush it and things locked up. Three weeks was the maximum possible uptime of PC's of that generation here in Denver, and maybe twice that at sea level. There have been charge distribution/charge bleed aspects incorporated into the design of every chip made since. E.g., you may use more than the minimum number of transistors to build a gate so there is more surface for the charge to distribute over, you may chose nand gates to build with since in a typical process you end up with a circuit with greater charge handling capacity, etc. I recall reading that chips made for use in space may have nine transistor gates for this very reason: better charge handling and thereby fewer reboots.
          What is going on is that with really really tiny circuits the devices make it no longer possible to deal with the induced charges through clever design and in the near future you will just flat out have to go after the charge directly from time to time.

Attacking the JVM

[LoonyMike]

This subject reminds me of a paper I saw some time ago, on a way to use the cosmic rays to your advantage and breaking out of the JVM. Here's the link: http://www.cs.princeton.edu/sip/pub/memerr.pdf [princeton.edu]

Defensive patent.

[Bill, Shooter of Bul]

Its widely acknowledged that Intel created EMF burst proof chips for the government. The technology inside of them was never publicly discussed. I think it might be similar to cosmic ray correction. They might just be patenting a sub set of it now before the shrinking die sizes cause someone else to patent technology they've been using for years.

Re:Mainframes allegedly already do this

[palegray.net]

There's a reason satellites are chock full of Z80 processors [wikipedia.org]: reliability in higher radiation environments.

Re:But there really is a memory problem

[Catalina588]

http://uksbsguy.com/blogs/doverton/archive/2007/05/23/microsoft-says-pcs-may-need-dram-upgrade-to-ecc-ram.aspx [uksbsguy.com]

Microsoft's XP crash analysis early in this decade concluded that PCs always left on tended to crash unexpectedly. Dump analysis showed strange values in key OS variables, and cosmic rays (or other bit-blasting particles) were among the likely sources. The conclusion was so clear that Microsoft floated the idea (see URL above) that Vista-generation PCs should use Error-Correcting Code (ECC) memory to detect and fix multi-bit errors -- in consumer PCs. [Note that servers and business workstations have used ECC memory for decades].

Having seen corrupted data in my own copy of Microsoft Money and other applications that I have left open for weeks, I am prepared to accept cosmic rays as well as Microsoft bugs as potential sources. Finally, why would Intel invest R&D capital in a cosmic ray detector if it had no likely or practical use for Intel's consumer and business customers?

Re:Mainframes allegedly already do this

[mrmeval]

http://www.allbusiness.com/technology/software-services-applications-programming/6493163-1.html [allbusiness.com]

MIL-STD-1705A radiation-hardened processors would be another choice. This company offers Linux support for what is normally so damned proprietary it's sekret. I don't know their product but just about anything that allows C to supplant ADA and JOVIAL can't be all bad.